Design and Performance Comparison of SOI and Conventional MOSFET Based CMOS Inverter

نویسندگان

  • Sanjoy Deb
  • C. J. Clement Singh
  • Subir Kumar Sarkar
  • N Basanta Singh
  • P C Pradhan
  • S. W. Bedell
  • I. J. Malik
  • L. M. Feng
  • F. J. Henley
  • Yuhua Cheng
  • Chenming Hu
چکیده

With the emergence of mobile computing and communication, low power device design and implementation have got a significant role to play in VLSI circuit design. Continuous device performance improvement has been made possible only through a combination of device scaling, new device structures and material property improvement to its fundamental limits.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Channel thickness dependency of high-k gate dielectric based double-gate CMOS inverter

This work investigates the channel thickness dependency of high-k gate dielectric-based complementary metal-oxide-semiconductor (CMOS) inverter circuit built using a conventional double-gate metal gate oxide semiconductor field-effect transistor (DG-MOSFET). It is espied that the use of high-k dielectric as a gate oxide in n/p DG-MOSFET based CMOS inverter results in a high noise margin as well...

متن کامل

Improvement of a Nano-scale Silicon on Insulator Field Effect Transistor Performance using Electrode, Doping and Buried Oxide Engineering

In this work, a novel Silicon on Insulator (SOI) MOSFET is proposed and investigated. The drain and source electrode structures are optimized to enhance ON-current while global device temperature and hot carrier injection are decreased. In addition, to create an effective heat passage from channel to outside of the device, a silicon region has embedded in the buried oxide. In order to reduce th...

متن کامل

Underlap Channel Nanoscale Dopant-Segregated Schottky Barrier SOI MOSFET for Low-Power Mixed Signal Circuits

In this paper, underlap channel dopant-segregated Schottky barrier (DSSB) SOI MOSFET has been proposed, in which the increased effective channel length (Leff) due to underlap channel at both source/drain (S/D) sides reduces the leakage currents, short-channel effects and the parasitic capacitances as compared to overlap channel DSSB SOI MOSFET. Although in strong inversion the voltage drop acro...

متن کامل

Output-Conductance Transition-Free Method for Improving Radio-Frequency Linearity of SOI MOSFET Circuits

In this article, a novel concept is introduced to improve the radio frequency (RF) linearity of partially-depleted (PD) silicon-on-insulator (SOI) MOSFET circuits. The transition due to the non-zero body resistance (RBody) in output conductance of PD SOI devices leads to linearity degradation. A relation for RBody is defined to eliminate the transition and a method to obtain transition-free c...

متن کامل

Simulation of SOI MOSFET using ATLAS

Silicon on insulator (SOI) CMOS offers performance gain over bulk CMOS mainly due to reduced parasitic capacitances and latchup. It is most promising technology when low cost low power and low voltage suppply is required. kink effect and self heating are two important points of concern in case of SOI MOSFET. In this paper we first briefly discuss the SOI technology, kink effect and lattice heat...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2011